Sony FCB camera block
LVDS (Low Voltage Differential Signaling) is a new technology that meets today’s high performance data transmission applications.
Because it allows the system to supply power down to 2V, it can also meet the needs of future applications. This technology is based on the ANSI/TIA/EIA-644 LVDS interface standard. LVDS technology has a low voltage differential signal of 330mV (250mV MIN and 450mV MAX) and a fast transition time. This allows products to achieve high data rates from 100 Mbps to more than 1 Gbps.
From the above description, we can see that LVDS cable has three advantages: low-voltage differential signal, strong anti-interference ability, and long transmission distance.
1. High data rate, low power consumption
LVDS standard in ANSI/TIA/EIA-644 definition, its theoretical limit rate is 1.923Gb/s, constant current source mode, low swing output mode determines LVDS cable has high-speed drive capability. The LVDS cable has a voltage of 350mV, which allows the power consumption to be reduced while the data is improved.
2.Low electromagnetic interference
There are two sources of electromagnetic interference: the accelerated movement of charges inside the chip and the transmission on the outside of the chip.
The electromagnetic interference generated by the chip depends on the frequency of the device, the output voltage swing and the rate of conversion. Because the LVDS cable standard has low voltage swing and the polarity of the differential signal is opposite, the electromagnetic fields radiated externally can cancel each other out. The tighter the coupling, the less electromagnetic energy is released to the outside world, effectively reducing EMI. In general, it produces less electromagnetic interference than I/O standards such as RS-422 and PECL.
3. Easy end matching
Terminal matching only requires a 100Ω resistor to be connected to two differential pairs, other high-speed signals (such as HSTL3 signals) in addition to a 50Ω terminal resistance, but also need 1.5V terminal voltage Vtt, and SSTL1 class connection mode needs to be connected to a 25Ω resistor at the beginning. The terminal needs to be connected to a 1.5V Vtt via a 50Ω resistor.
4. The power supply is low
With the development of high speed and high integration circuits, reducing the supply voltage has become an urgent problem to be solved, which not only reduces the power consumption of high integration circuits, but also eliminates the heat dissipation pressure inside the chip, which helps to improve the integration.LVDS cable does not rely on specific supply voltage characteristics because LVDS cable has an advantage in this area.
5. Strong anti-noise ability
Differential data transmission has better anti-noise capability. When the current and voltage flowing through a pair of differential signal lines are in opposite phases, the noise signal is coupled in common mode on the differential line, and the noise is eliminated at the receiving end. Because the electromagnetic fields around the differential signal lines also cancel each other, the differential signal transmission is smaller than the electromagnetic radiation transmitted by the single line signal. Constant current source mode is not prone to spikes, further reducing noise, so LVDS cable has a strong ability to resist common mode noise.
6. Precise timing positioning
Because the change of the differential signal does not depend on the high and low threshold voltage as the ordinary single-ended signal, it is basically not affected by the process and temperature, so as to reduce the error in the timing, forming the accurate and effective transmission of high-speed digital signals.
7. Adapt to the wide range of ground plane voltage changes
LVDS cable receivers can withstand “ground” voltage changes between the driver and the receiver of at least ±1V. Since LVDS drivers typically have a bias voltage of +1.2V, the reference voltage change of the “ground”, the bias voltage of the driver, and the mild coupling are the sum of noise, and at the receiver side, the “ground” of the driver is a common mode voltage. When the swing does not exceed 400mV, the common model circumference is +0.2 ~ +2.2V, and in general, the input voltage range of the receiver can vary within 0 ~ +2.4V.